Japan, July 14 -- CANON INC has got intellectual property rights for 'SEMICONDUCTOR DEVICE, APPARATUS, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE.' Other related details are as follows:
Application Number: JP,2022-083066
Category (FI): H01L21/88@S,H10W20/41@B,H10W20/44@M,H10W20/44@X,H10W20/49@S,H10W80/00@A,H10P58/00@Q,H01L21/78@Q,H01L21/90@A,H01L21/88@M,H01L21/02@B
Stage: PROBLEM TO BE SOLVED: To improve the reliability of joining in a semiconductor device obtained by joining two semiconductor components on a joint surface.SOLUTION: A semiconductor device 1 has a first semiconductor component 10 that has a first semiconductor substrate 110 and a first wiring structure 120, and a second semiconductor component 20 that has a second semiconductor substrate 210 and a second wiring structure 220, and a first surface S1 of the first semiconductor component 10 and a second surface S2 of the second semiconductor component 20 are joined to each other. Areas having figures obtained by vertically projecting the first surface S1, the second surface S2, the first wiring structure 120, and the second wiring structure 220 on a virtual plane VP as outer peripheries are defined as a first area A1, a second area A2, a third area A3, and a fourth area A4, respectively. In this case, the area of the first area A1 is smaller than the area of the second area A2; the outer periphery of the first area A1 is included in its entirety in the second area A2; the area of the fourth area A4 is smaller than the area of the third area A3; and the outer periphery of the fourth area A4 is included in its entirety in the third area A3.SELECTED DRAWING: Figure 1 (Grant)
Filing Date: May 20, 2022
Publication Date: Jan. 20, 2023
The original document can be viewed at: https://www.j-platpat.inpit.go.jp/p0100
Disclaimer: Curated by HT Syndication.
