Japan, July 27 -- ARTERIS INC has got intellectual property rights for 'SYSTEM AND METHOD FOR SYNTHESIS OF NETWORK-ON-CHIP FOR DEADLOCK-FREE TRANSFORMATION.' Other related details are as follows:
Application Number: JP,2025-124806
Category (FI): G06F30/347,G06F30/337
Stage: Grant (IP right granted following substantive examination.)
Filing Date: July 25, 2025
Publication Date: Oct. 28, 2025
The original document can be viewed at: https://www.j-platpat.inpit.go.jp/p0100
Disclaimer: Curated by HT Syndication.
